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Research Spending & Results

Award Detail

Awardee:PURDUE UNIVERSITY
Doing Business As Name:Purdue University
PD/PI:
  • Sumeet K Gupta
  • (814) 865-1372
  • skgupta@psu.edu
Award Date:11/28/2017
Estimated Total Award Amount: $ 450,000
Funds Obligated to Date: $ 450,000
  • FY 2017=$450,000
Start Date:01/01/2017
End Date:06/30/2020
Transaction Type:Grant
Agency:NSF
Awarding Agency Code:4900
Funding Agency Code:4900
CFDA Number:47.070
Primary Program Source:040100 NSF RESEARCH & RELATED ACTIVIT
Award Title or Description:SHF: Small: Ferroelectric Transistor based Coupled Oscillators for Non-Boolean Computing
Federal Award ID Number:1814756
DUNS ID:072051394
Parent DUNS ID:072051394
Program:SOFTWARE & HARDWARE FOUNDATION
Program Officer:
  • Sankar Basu
  • (703) 292-8910
  • sabasu@nsf.gov

Awardee Location

Street:Young Hall
City:West Lafayette
State:IN
ZIP:47907-2114
County:West Lafayette
Country:US
Awardee Cong. District:04

Primary Place of Performance

Organization Name:Purdue University
Street:
City:
State:IN
ZIP:47907-2114
County:West Lafayette
Country:US
Cong. District:04

Abstract at Time of Award

Since conventional computing architectures based on Boolean processing of inputs may be sub-optimal for tasks involving recognition and sensory processing, exploration of new non-Boolean computing technologies has the potential to assume an important role. This project aims at addressing this issue by investigating new post-CMOS devices and circuits, and extensively analyzing their implications at the application level. The research outcomes are likely to have a direct impact on critical applications such as computer aided diagnosis, speech/face recognition, data classification and resource allocation, and benefit several areas such as healthcare, defense, and security. Moreover, power savings achieved with the proposed techniques may translate to longer battery life for mobile systems facilitating a richer user experience and ultra-low power processing. The project will enhance graduate and undergraduate education by integrating the research outputs in the curriculum. The participation of under-represented groups will also be encouraged. The proposed research utilizes the emerging technology of ferroelectric transistor to design novel low power and compact oscillators by translating the inherent non-linearity of the ferroelectrics to sustained oscillations. A multitude of such oscillators, whose dynamics can be controlled, are coupled to realize a non-Boolean computing fabric. The extent of synchronization amongst the oscillators provides information about the degree of match/mismatch amongst different signals, enabling efficient decision-making for applications such as pattern matching, motion sensing and others. The proposed approach involves extensive co-design of devices and circuits to harness the unique features offered by the ferroelectric transistors for enhancing the energy- and area-efficiencies of the coupled oscillators. The research effort spans different levels of design abstraction including (i) the exploration of novel ferroelectric based devices amenable for the proposed approach, (ii) new oscillator designs, and (iii) a comprehensive application-level analysis. Extensive benchmarking of ferroelectric based oscillators will be performed against previously explored oscillators to comprehensively quantify their benefits and trade-offs. In addition, detailed investigation establishing the relationships between the device-circuit characteristics and the inherent properties of the ferroelectric materials will be carried out to uncover the fundamental attributes of the proposed oscillators and their rich oscillation dynamics.

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